Chip Resistor Arrays

Bourns 提供多种标准阻值和常用尺寸的芯片排阻。这些芯片排阻提供设计者在效能、空间的节省,以及低成 本各种现有的弹性。除了标准隔离及总线设定之外,数种高速终端芯片排阻用于 FPGAs,无论是 LVDS 或 LVPCL I/O 标准均可 使用。


请连结标准值表(E Table) 参考

Series CAY06-J-AS
数据表 CAY06-J-AS
产品图片 CAY06-J4AS_part
阻值范围 10 ohms to 1 megohm
允许公差 ±5 %
温度系数 ±200 ppm/°C
单颗电阻功率 0.031 W
相关文件 CAY06-J2AS
工程檔 Downloads
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